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2001 data sheet description the pd78f0988a and 78f0988a(a) are products in the pd780988 subseries in the 78k/0 series that have flash memory in the place of the internal rom of the pd780988. flash memory can be written or erased electrically with the device mounted on the board. therefore, the pd78f0988a and pd78f0988a(a) are ideal for evaluation in system development, small-scale production, or systems likely to be upgraded frequently. detailed function descriptions are provided in the following user? manuals. be sure to read them before designing. pd780988 subseries user? manual: u13029e 78k/0 series instruction user? manual: u12326e features ? pin-compatible with mask rom version (except v pp pin) ? flash memory: 60 kb note 1 ? internal high-speed ram: 1024 bytes ? internal expansion ram: 1024 bytes note 2 ? operable in the same supply voltage range as the mask rom version (v dd = 4.0 to 5.5 v) notes 1. the capacity of the flash memory can be changed with the internal memory size switching register (ims). 2. the capacity of the internal expansion ram can be changed with the internal expansion ram size switching register (ixs). remark for the differences between the flash memory versions and the mask rom versions, refer to 1. differences between pd78f0988a and mask rom versions. ordering information part number package quality grade pd78f0988acw 64-pin plastic sdip (19.05 mm (750)) standard (for general electrical equipment) pd78f0988agc-ab8 64-pin plastic qfp (14 14) standard (for general electrical equipment) pd78f0988agc-8bs 64-pin plastic lqfp (14 14) standard (for general electrical equipment) pd78f0988agc(a)-ab8 64-pin plastic qfp (14 14) special (for high-reliability electrical equipment) pd78f0988agc(a)-8bs 64-pin plastic lqfp (14 14) special (for high-reliability electrical equipment) for details of the quality grade and its application fields, refer to quality grades on nec semiconductor devices (c11531e) . mos integrated circuit 8-bit single-chip microcontrollers pd78f0988a, 78f0988a(a) document no. u15801ej1v0ds00 (1st edition) date published october 2001 n cp(k) printed in japan the information in this document is subject to change without notice. before using this document, please confirm that this is the latest version. not all devices/types available in every country. please check with local nec representative for availability and additional information.
2 pd78f0988a, 78f0988a(a) data sheet u15801ej1v0ds 78k/0 series lineup the products in the 78k/0 series are listed below. the names enclosed in boxes are subseries names. 64-pin 64-pin 80-pin 80-pin 80-pin emi-noise reduced version of the pd78054 pd78018f with enhanced uart and d/a converter and enhanced i/o pd780034a pd780988 pd780034ay 64-pin pd780024a with increased ram capacity. pd780024a with enhanced a/d converter on-chip inverter controller and uart. emi-noise reduced. pd78064 pd78064b pd780308 100-pin 100-pin 100-pin pd780308y pd78064y 80-pin 78k/0 series lcd drive pd78064 with enhanced sio, and increased rom, ram capacity emi-noise reduced version of the pd78064 basic subseries for lcd drive, on-chip uart bus interface supported pd78083 pd78018f pd78018fy pd78014h emi-noise reduced version of the pd78018f basic subseries for control on-chip uart, capable of operating at low voltage (1.8 v) 42-/44-pin 64-pin 64-pin pd78018f with enhanced serial i/o 80-pin pd78054 with enhanced serial i/o 100-pin 100-pin products in mass production products under development y subseries products are compatible with i 2 c bus. pd78054 with added timer and enhanced external interface romless version of the pd78078 100-pin pd78078y with enhanced serial i/o and limited function 100-pin emi-noise reduced version of the pd78078 inverter control pd780208 100-pin vfd drive pd78044f with enhanced i/o and vfd c/d. display output total: 53 pd780208 pd78098b pd78054 with added iebus tm controller. 100-pin pd780024a pd780024ay 80-pin 80-pin pd780852 pd780828b for automobile meter driver. on-chip can controller 100-pin pd780958 pd780816 pd780703y pd780833y pd780702y for industrial meter control on-chip automobile meter controller/driver meter control 80-pin 80-pin on-chip iebus controller 80-pin 64-pin on-chip can controller on-chip controller compliant with j1850 (class 2) specialized for can controller function pd780948 on-chip can controller 64-pin pd780078 pd780078y pd780034a with added timer and enhanced serial i/o pd78054 pd78054y pd78058f pd78058fy pd780058 pd780058y pd78070a pd78070ay pd78078 pd78078y pd780018ay control pd78075b pd780065 pd78044h pd780232 80-pin 80-pin for panel control. on-chip vfd and c/d. display output total: 53 pd78044f with added n-ch open-drain i/o. display output total: 34 pd78044f 80-pin basic subseries for vfd drive. display output total: 34 120-pin pd780308 with enhanced display function and timer. segment signal output: 40 pins max. pd780318 pd780328 120-pin 120-pin pd780308 with enhanced display function and timer. segment signal output: 32 pins max. pd780308 with enhanced display function and timer. segment signal output: 24 pins max. pd780338 remark vfd (vacuum fluorescent display) is referred to as fip tm (fluorescent indicator panel) in some documents, but the functions of the two are the same.
3 pd78f0988a, 78f0988a(a) data sheet u15801ej1v0ds the major functional differences between the subseries are shown below. function timer 8-bit 10-bit 8-bit serial interface i/o external subseries name 8-bit 16-bit watch wdt a/d a/d d/a expansion control pd78075b 32 k to 40 k 4 ch 1 ch 1 ch 1 ch 8 ch 2 ch 3 ch (uart: 1 ch) 88 1.8 v pd78078 48 k to 60 k pd78070a 61 2.7 v pd780058 24 k to 60 k 2 ch 3 ch (time-division uart: 1 ch) 68 1.8 v pd78058f 48 k to 60 k 3 ch (uart: 1 ch) 69 2.7 v pd78054 16 k to 60 k 2.0 v pd780065 40 k to 48 k 4 ch (uart: 1 ch) 60 2.7 v pd780078 48 k to 60 k 2 ch 8 ch 3 ch (uart: 2 ch) 52 1.8 v pd780034a 8 k to 32 k 1 ch 3 ch (uart: 1 ch) 51 pd780024a 8 ch pd78014h 2 ch 53 pd78018f 8 k to 60 k pd78083 8 k to 16 k 1 ch (uart: 1 ch) 33 inverter pd780988 16 k to 60 k 3 ch note 1 ch 8 ch 3 ch (uart: 2 ch) 47 4.0 v control vfd pd780208 32 k to 60 k 2 ch 1 ch 1 ch 1 ch 8 ch 2 ch 74 2.7 v drive pd780232 16 k to 24 k 3 ch 4 ch 40 4.5 v pd78044h 32 k to 48 k 2 ch 1 ch 1 ch 8 ch 1 ch 68 2.7 v pd78044f 16 k to 40 k 2 ch lcd pd780338 48 k to 60 k 3 ch 2 ch 1 ch 1 ch 10 ch 1 ch 2 ch (uart: 1 ch) 54 1.8 v drive pd780328 62 pd780318 70 pd780308 48 k to 60 k 2 ch 1 ch 8 ch 3 ch (time-division uart: 1 ch) 57 2.0 v pd78064b 32 k 2 ch (uart: 1 ch) pd78064 16 k to 32 k bus pd780948 60 k 2 ch 2 ch 1 ch 1 ch 8 ch 3 ch (uart: 1 ch) 79 4.0 v interface supported pd78098b 40 k to 60 k 1 ch 2 ch 69 2.7 v pd780816 32 k to 60 k 2 ch 12 ch 2 ch (uart: 1 ch) 46 4.0 v meter pd780958 48 k to 60 k 4 ch 2 ch 1 ch 2 ch (uart: 1 ch) 69 2.2 v control dash pd780852 32 k to 40 k 3 ch 1 ch 1 ch 1 ch 5 ch 3 ch (uart: 1 ch) 56 4.0 v board control pd780828b 32 k to 60 k 59 note 16-bit timer: 2 channels 10-bit timer: 1 channel v dd min. value rom capacity (bytes)
4 pd78f0988a, 78f0988a(a) data sheet u15801ej1v0ds overview of functions item function internal flash memory 60 kb note 1 memory high-speed ram 1024 bytes expansion ram 1024 bytes note 2 memory space 64 kb general-purpose register 8 bits 32 registers (8 bits 8 registers 4 banks) instruction cycle on-chip instruction execution time variable function 0.24 s/0.48 s/0.96 s/1.9 s/3.8 s (@ 8.38 mhz operation with system clock) instruction set ?16-bit operation ?multiply/divide (8 bits 8 bits, 16 bits 8 bits) ?bit manipulation (set, reset, test, boolean operation) ?bcd adjust, etc. i/o ports total: 47 ?cmos inputs: 8 ?cmos i/o: 39 real-time output ports ?8 bits 1 or 4 bits 2 ?6 bits 1 or 4 bits 1 a/d converter ?10-bit resolution 8 channels ?power supply voltage: av dd = 4.0 to 5.5 v serial interface ?uart mode: 2 channels ?3-wire serial i/o mode: 1 channel timer ?16 bit timer/event counter: 2 channels ?8-bit timer/event counter: 3 channels ?10-bit inverter control timer: 1 channel ?watchdog timer: 1 channel timer output 11 (general-purpose outputs: 5, inverter control outputs: 6) vectored maskable internal: 16, external: 8 interrupt non-maskable internal: 1 sources software 1 power supply voltage v dd = 4.0 to 5.5 v operating ambient temperature t a = ?0 to +85 c package ?64-pin plastic sdip (19.05 mm (750)) note 3 ?64-pin plastic qfp (14 14) ?64-pin plastic lqfp (14 14) notes 1. the capacity of the flash memory can be changed with the internal memory size switching register (ims). 2. the capacity of the internal expansion ram can be changed with the internal expansion ram size switching register (ixs). 3. standard quality grade products only.
5 pd78f0988a, 78f0988a(a) data sheet u15801ej1v0ds pin configuration (top view) ? 64-pin plastic sdip (19.05 mm (750)) pd78f0988acw cautions 1. in the normal operation mode, connect the v pp pin directly to v ss0 . 2. in the flash memory writing mode, connect the v pp pin to v ss0 via a 10 k ? pull-down resistor. 3. the 64-pin plastic sdip (19.05 mm (750)) package is not provided for special quality grade products. remark when the pd78f0988a and 78f0988a(a) are used in applications where the noise generated inside the microcontroller needs to be reduced, the implementation of noise reduction measures, such as supplying voltage to v dd0 and v dd1 individually and connecting v ss0 and v ss1 to different ground lines, is recommended. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 p40/ad0 p41/ad1 p42/ad2 p43/ad3 p44/ad4 p45/ad5 p46/ad6 p47/ad7 p50 p51/sck p52/si p53/so p54/ti000/to00/intp4 p55/ti010/intp5 p56/ti001/to01/intp6 p57/ti011/intp7 v ss0 v dd0 to70 to71 to72 to73 to74 to75 p20/rxd00 p21/txd00 p22/rxd01 p23/txd01 p24/ti50/to50 p25/ti51/to51 p26/ti52/to52 v dd1 p67/astb p66/wait p65/wr p64/rd p37/rtp7 p36/rtp6 p35/rtp5 p34/rtp4 p33/rtp3 p32/rtp2 p31/rtp1 p30/rtp0 p01/intp1 p00/intp0/toff7 v ss1 x1 x2 test p03/intp3/adtrg p02/intp2 reset av dd av ref p10/ani0 p11/ani1 p12/ani2 p13/ani3 p14/ani4 p15/ani5 p16/ani6 p17/ani7 av ss 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
6 pd78f0988a, 78f0988a(a) data sheet u15801ej1v0ds ? 64-pin plastic qfp (14 14) pd78f0988agc-ab8, 78f0988agc(a)-ab8 ? 64-pin plastic lqfp (14 14) pd78f0988agc-8bs, 78f0988agc(a)-8bs cautions 1. in the normal operation mode, connect the v pp pin directly to v ss0 . 2. in the flash memory writing mode, connect the v pp pin to v ss0 via a 10 k ? pull-down resistor. remark when the pd78f0988a and 78f0988a(a) are used in applications where the noise generated inside the microcontroller needs to be reduced, the implementation of noise reduction measures, such as supplying voltage to v dd0 and v dd1 individually and connecting v ss0 and v ss1 to different ground lines, is recommended. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 p50 p51/sck p52/si p53/so p54/ti000/to00/intp4 p55/ti010/intp5 p56/ti001/to01/intp6 p57/ti011/intp7 v ss0 v dd0 to70 to71 to72 to73 to74 to75 p33/rtp3 p32/rtp2 p31/rtp1 p30/rtp0 p01/intp1 p00/intp0/toff7 v ss1 x1 x2 test p03/intp3/adtrg p02/intp2 reset av dd av ref p10/ani0 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 p20/rxd00 p21/txd00 p22/rxd01 p23/txd01 p24/ti50/to50 p25/ti51/to51 p26/ti52/to52 v dd1 av ss p17/ani7 p16/ani6 p15/ani5 p14/ani4 p13/ani3 p12/ani2 p11/ani1 p47/ad7 p46/ad6 p45/ad5 p44/ad4 p43/ad3 p42/ad2 p41/ad1 p40/ad0 p67/astb p66/wait p65/wr p64/rd p37/rtp7 p36/rtp6 p35/rtp5 p34/rtp4 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
7 pd78f0988a, 78f0988a(a) data sheet u15801ej1v0ds rxd00, rxd01: receive data sck: serial clock si: serial input so: serial output ti000, ti001, ti010, ti011, ti50 to ti52: timer input to00, to01, to50 to to52, to70 to to75: timer output toff7: timer output off txd00, txd01: transmit data v dd0 , v dd1 : power supply v pp : programming power supply v ss0 , v ss1 : ground wait: wait wr: write strobe x1, x2: crystal ad0 to ad7: address/data bus adtrg: ad trigger input ani0 to ani7: analog input astb: address strobe av dd : analog power supply av ref : analog reference voltage av ss : analog ground intp0 to intp7: external interrupt input p00 to p03: port 0 p10 to p17: port 1 p20 to p26: port 2 p30 to p37: port 3 p40 to p47: port 4 p50 to p57: port 5 p64 to p67: port 6 rd: read strobe reset: reset rtp0 to rtp7: real-time port
pd78f0988a, 78f0988a(a) 8 data sheet u15801ej1v0ds block diagram 8-bit timer/ event counter 50 8-bit timer/ event counter 51 8-bit timer/ event counter 52 watchdog timer a/d converter interrupt control real-time output port to50/ti50/p24 ani0/p10 to ani7/p17 av dd av ss av ref adtrg/intp3/p03 intp1/p01 and intp2/p02 78k/0 cpu core flash memory (60 kb) ram (1024 bytes) v dd0 , v dd1 v ss0 , v ss1 v pp port 0 port 1 port 3 port 4 port 5 port 6 external access system control p00 to p03 p10 to p17 p30 to p37 port 2 p20 to p26 p40 to p47 p50 to p57 p64 to p67 ad0/p40 to ad7/p47 rd/p64 wr/p65 wait/p66 astb/p67 reset x1 x2 to51/ti51/p25 16-bit timer/ event counter 00 16-bit timer/ event counter 01 ti000/to00/intp4/p54 ti010/intp5/p55 ti011/intp7/p57 ti001/to01/intp6/p56 to52/ti52/p26 uart00 uart01 rtp0/p30 to rtp7/p37 txd00/p21 rxd00/p20 txd01/p23 rxd01/p22 sio3 sck/p51 si/p52 so/p53 intp0/toff7/p00 intp3/adtrg/p03 intp5/ti010/p55 intp6/ti001/to01/p56 intp4/ti000/to00/p54 intp7/ti011/p57 real-time pulse unit to70 to to75
pd78f0988a, 78f0988a(a) 9 data sheet u15801ej1v0ds contents 1. differences between pd78f0988a and mask rom versions ................................... 10 2. differences between pd78f0988a and pd78f0988 ...................................................... 11 3. pin functions ............................................................................................................................... .12 3.1 port pins ............................................................................................................................... ..................... 12 3.2 non-port pins ............................................................................................................................... ............ 13 3.3 pin i/o circuits and recommended connection of unused pins .................................................... 15 4. internal memory size switching register (ims) ........................................................... 17 5. internal expansion ram size switching register (ixs) ............................................. 18 6. flash memory programming ................................................................................................. 19 6.1 selection of communication mode ....................................................................................................... 19 6.2 flash memory programming functions ............................................................................................... 20 6.3 connection of flashpro iii ...................................................................................................................... 20 7. electrical specifications ...................................................................................................... 22 8. package drawings ..................................................................................................................... 38 9. recommended soldering conditions ................................................................................ 41 appendix a. development tools ................................................................................................. 42 appendix b. related documents ................................................................................................ 48
pd78f0988a, 78f0988a(a) 10 data sheet u15801ej1v0ds 1. differences between pd78f0988a and mask rom versions the pd78f0988a is a product with a flash memory which enables on-board writing, erasing and rewriting of programs. except for flash memory specifications, the same functions as those of mask rom versions can be obtained by setting the internal memory size switching register (ims) and internal expansion ram size switching register (ixs). table 1-1 shows the differences between the flash memory version ( pd78f0988a) and mask rom versions ( pd780982, 780983, 780984, 780986, 780988). table 1-1. differences between pd78f0988a and mask rom versions item pd78f0988a mask rom versions internal rom structure flash memory mask rom internal rom capacities 60 kb pd780982: 16 kb pd780983: 24 kb pd780984: 32 kb pd780986: 48 kb pd780988: 60 kb internal expansion ram capacities 1024 bytes pd780982: none pd780983: none pd780984: none pd780986: 1024 bytes pd780988: 1024 bytes change of internal rom capacity with internal available note 1 not available memory size switching register (ims) change of internal expansion ram capacity with available note 2 not available internal expansion ram size switching register (ixs) test pin not provided provided v pp pin provided not provided notes 1. flash memory capacity becomes 60 kb by reset input. 2. internal expansion ram capacity becomes 0 bytes by reset input. caution there are differences in noise immunity and noise radiation between the flash memory and mask rom versions. when pre-producing an application set with the flash memory version and then mass-producing it with the mask rom version, be sure to conduct sufficient evaluations for the commercial samples (not engineering samples) of the mask rom versions. in addition, when replacing the pd78f0988 with the pd78f0988a, be sure to also conduct sufficient evaluation with the pd78f0988a.
pd78f0988a, 78f0988a(a) 11 data sheet u15801ej1v0ds 2. differences between pd78f0988a and pd78f0988 the differences between the pd78f0988a and pd78f0988 (old version) are shown in table 2-1. table 2-1. differences between pd78f0988a and pd78f0988 part number pd78f0988a pd78f0988 (old version) item flash memory area two areas three areas 0: 0 to 1fffh 0: 0 to 1fffh 1: 2000h to efffh 1: 2000h to 7fffh 2: 8000h to efffh quality grade ?standard ?standard ?special (64-pin plastic qfp (14 14), 64-pin plastic lqfp (14 14))
pd78f0988a, 78f0988a(a) 12 data sheet u15801ej1v0ds 3. pin functions 3.1 port pins pin name i/o function after reset alternate function p00 i/o port 0 input intp0/toff7 p01 4-bit i/o port intp1 p02 input/output can be specified in 1-bit units. intp2 p03 use of an on-chip pull-up resistor can be specified by intp3/adtrg software setting. p10 to p17 input port 1 input ani0 to ani7 8-bit input only port p20 i/o port 2 input rxd00 p21 7-bit i/o port txd00 p22 input/output can be specified in 1-bit units. rxd01 p23 use of an on-chip pull-up resistor can be specified by txd01 p24 software setting. ti50/to50 p25 ti51/to51 p26 ti52/to52 p30 to p37 i/o port 3 input rtp0 to rtp7 8-bit i/o port input/output can be specified in 1-bit units. use of an on-chip pull-up resistor can be specified by software setting. p40 to p47 i/o port 4 input ad0 to ad7 8-bit i/o port input/output can be specified in 1-bit units. use of an on-chip pull-up resistor can be specified by software setting. p50 i/o port 5 input p51 8-bit i/o port sck p52 input/output can be specified in 1-bit units. si p53 leds can be driven directly. so p54 use of an on-chip pull-up resistor can be specified by intp4/ti000/to00 p55 software setting. intp5/ti010 p56 intp6/ti001/to01 p57 intp7/ti011 p64 i/o port 6 input rd p65 4-bit i/o port wr p66 input/output can be specified in 1-bit units. wait p67 use of an on-chip pull-up resistor can be specified by astb software setting.
pd78f0988a, 78f0988a(a) 13 data sheet u15801ej1v0ds 3.2 non-port pins (1/2) pin name i/o function after reset alternate function intp0 input external interrupt request input for which the valid edge input p00/toff7 intp1 (rising edge, falling edge, or both rising and falling input p01 intp2 edges) can be specified input p02 intp3 input p03/adtrg intp4 input p54/ti000/to00 intp5 input p55/ti010 intp6 input p56/ti001/to01 intp7 input p57/ti011 ti50 input external count clock input to 8-bit timer/event counter 50 input p24/to50 ti51 external count clock input to 8-bit timer/event counter 51 input p25/to51 ti52 external count clock input to 8-bit timer/event counter 52 input p26/to52 ti000 external count clock input to 16-bit timer/event counter 00 input p54/intp4/to00 capture trigger input to capture register (cr000, cr010) of 16-bit timer/event counter 00 ti010 capture trigger input to capture register (cr000) of 16-bit input p55/intp5 timer/event counter 00 ti001 external count clock input to 16-bit timer/event counter 01 input p56/intp6/to01 capture trigger input to capture register (cr001, cr011) of 16-bit timer/event counter 01 ti011 capture trigger input to capture register (cr001) of 16-bit input p57/intp7 timer/event counter 01 to50 output 8-bit timer/event counter 50 output input p24/ti50 to51 8-bit timer/event counter 51 output input p25/ti51 to52 8-bit timer/event counter 52 output input p26/ti52 to00 16-bit timer/event counter 00 output input p54/intp4/ti000 to01 16-bit timer/event counter 01 output input p56/intp6/ti001 rtp0 to rtp7 output real-time output port that outputs pulses in synchronization input p30 to p37 with trigger signals outputs from the real-time pulse unit txd00 output asynchronous serial interface serial data output input p21 txd01 input p23 rxd00 input asynchronous serial interface serial data input input p20 rxd01 input p22 sck i/o serial interface serial clock input/output input p51 si input serial interface serial data input input p52 so output serial interface serial data output input p53 ani0 to ani7 input a/d converter analog input input p10 to p17 adtrg input external trigger signal input to the a/d converter input p03/intp3 to70 to to75 output timer output for the 3-phase pwm inverter control hi-z toff7 input timer output (to70 to to75) stop external input input p00/intp0 ad0 to ad7 i/o address/data bus for expanding memory externally input p40 to p47 rd output strobe signal output for reading from external memory input p64 wr strobe signal output for writing to external memory input p65 wait input wait insertion at external memory access input p66 astb output strobe output that externally latches address information input p67 output to ports 4 and 5 to access external memory av ref input a/d converter reference voltage input av dd a/d converter analog power supply
pd78f0988a, 78f0988a(a) 14 data sheet u15801ej1v0ds 3.2 non-port pins (2/2) pin name i/o function after reset alternate function av ss a/d converter ground potential reset input system reset input x1 input connecting crystal resonator for system clock oscillation x2 v dd0 positive power supply for ports v ss0 ground potential for ports v dd1 positive power supply except for ports v ss1 ground potential except for ports v pp high-voltage application during program write/verify. in the normal operation mode, connect directly to v ss0 .
pd78f0988a, 78f0988a(a) 15 data sheet u15801ej1v0ds 3.3 pin i/o circuits and recommended connection of unused pins the i/o circuit type of each pin and recommended connection of unused pins are shown in table 3-1. for the i/o circuit configuration of each type, refer to figure 3-1. table 3-1. types of pin i/o circuits pin name i/o circuit i/o recommended connection of unused pins type p00/intp0/toff7 8-c i/o input: independently connect to v ss0 via a resistor. p01/intp1 output: leave open p02/intp2 p03/intp3/adtrg p10/ani0 to p17/ani7 25 input independently connect to v dd0 or v ss0 via a resistor. p20/rxd00 8-c i/o input: independently connect to v dd0 or v ss0 via a p21/txd00 5-h resistor. p22/rxd01 8-c output: leave open. p23/txd01 5-h p24/ti50/to50 8-c p25/ti51/to51 p26/ti52/to52 p30/rtp0 to p37/rtp7 5-h p40/ad0 to p47/ad7 p50 p51/sck 8-c p52/si 5-h p53/so p54/intp4/ti000/to00 p55/intp5/ti010 p56/intp6/ti001/to01 p57/intp7/ti011 p64/rd p65/wr p66/wait p67/astb to70 to to75 4 output leave open. reset 2 input av dd connect to v dd0 . av ref connect to v ss0 . av ss v pp connect directly to v ss0 .
pd78f0988a, 78f0988a(a) 16 data sheet u15801ej1v0ds figure 3-1. pin i/o circuits type 2 schmitt-triggered input with hysteresis characteristics push-pull output that enables high-impedance output (both p-ch and n-ch are off) in type 4 data output disable p-ch in/out v dd0 n-ch input enable p-ch v dd0 pullup enable type 5-h v ss0 data output disable p-ch out v dd0 n-ch v ss0 data output disable p-ch in/out v dd0 n-ch p-ch v dd0 pullup enable v ss0 type 8-c type 25 input enable comparator + p-ch n-ch v ref (threshold voltage) v ss0 in
pd78f0988a, 78f0988a(a) 17 data sheet u15801ej1v0ds 7 6 5 4 3 2 1 0 address after reset r/w ims ram2 ram1 ram0 0 rom3 rom2 rom1 rom0 fff0h cfh r/w rom3 rom2 rom1 rom0 selection of internal rom capacity 0 1 0 0 16 kb 0 1 1 0 24 kb 1 0 0 0 32 kb 1 1 0 0 48 kb 1 1 1 1 60 kb other than above setting prohibited ram2 ram1 ram0 selection of internal high-speed ram capacity 1 1 0 1024 bytes other than above setting prohibited 4. internal memory size switching register (ims) ims is a register that is set by software and is used to specify a part of the internal memory that is not to be used. by setting this register, the internal memory of the pd78f0988a and pd78f0988 can be mapped in the same manner as that of a mask rom version with a different internal memory (rom and ram) capacity. ims is set with an 8-bit memory manipulation instruction. ims is set to cfh by reset input. figure 4-1. format of internal memory size switching register table 4-1 shows the ims setting values to make the memory mapping the same as that of mask rom versions. table 4-1. setting value of internal memory size switching register target mask rom versions ims setting value pd780982 c4h pd780983 c6h pd780984 c8h pd780986 cch pd780988 cfh
pd78f0988a, 78f0988a(a) 18 data sheet u15801ej1v0ds 7 6 5 4 3 2 1 0 address after reset r/w 00 0 ixram4 ixram3 ixram2 i xram1 ixram0 fff4h 0ch r/w ixs ixram4ixram3 ixram2 ixram1 ixram0 selection of internal expansion ram capacity 0 1 0 1 0 1024 bytes 01 1 0 0 no internal expansion ram other than above setting prohibited 5. internal expansion ram size switching register (ixs) ixs is a register that sets the internal expansion ram capacity by software setting. by using this register, the memory of the pd78f0988a and pd78f0988a(a) can be mapped in the same manner as that of a mask rom version with a different internal expansion ram capacity. ixs is set with an 8-bit memory manipulation instruction. ixs is set to 0ch by reset input. figure 5-1. format of internal expansion ram size switching register table 5-1 shows the ixs setting values to make the memory mapping the same as that of mask rom versions. table 5-1. setting value of internal expansion ram size switching register target mask rom versions ixs setting value pd780982 0ch pd780983 pd780984 pd780986 0ah pd780988
pd78f0988a, 78f0988a(a) 19 data sheet u15801ej1v0ds v pp reset 10 v v dd v ss v dd v ss 1 2 n v pp pulses flash memory write mode 6. flash memory programming on-board writing of flash memory (with device mounted on target system) is supported. on-board writing is done after connecting a dedicated flash programmer (flashpro iii (part numbers fl-pr3 and pg-fp3)) to the host machine and target system. moreover, writing to flash memory can also be performed using a flash memory writing adapter connected to flashpro iii. remark fl-pr3 is a product of naito densei machida mfg. co., ltd. 6.1 selection of communication mode writing to flash memory is performed using flashpro iii with a serial communication mode. select the communi- cation mode for writing from table 6-1. for the selection of the communication mode, a format like the one shown in figure 6-1 is used. the communication modes are selected using the v pp pulse numbers shown in table 6-1. table 6-1. communication mode list communication mode number of pin used note 1 number of channels v pp pulses 3-wire serial i/o 1 sck/p51 0 si/p52 so/p53 3-wire serial i/o + hs 1 p50 (hs) 3 sck/p51 si/p52 so/p53 uart 1 rxd00/p20 8 txd00/p21 pseudo 3-wire serial i/o 1 p24/ti50/to50 (serial data input) 12 mode note 2 p25/ti51/to51 (serial data output) p26/ti52/to52 (serial clock input) notes 1. shifting to the flash memory programming mode sets all pins not used for flash memory programming to the same state as that immediately after reset. if the external device connected to each port does not acknowledge the state immediately after reset, pin handling such as connecting to v dd or v ss via a resistor is required. 2. serial transfer is performed by controlling ports using software. caution always select the communication mode according to the number of v pp pulses shown in table 6- 1. figure 6-1. communication mode selection format
pd78f0988a, 78f0988a(a) 20 data sheet u15801ej1v0ds note for input to x1, a normal oscillator can also be used instead of clk. 6.2 flash memory programming functions flash memory writing is performed via command and data transmit/receive operations using the selected communication mode. the main functions are listed in table 6-2. table 6-2. main functions of flash memory programming function description batch erase erases the contents of the entire memory. batch blank check checks that the entire memory has been erased. data write performs writing to flash memory according to the write start address and the number of the data to be written (the number of bytes). batch verify compares the contents of the entire memory and the input data. write back countermeasure for the over-erase state of the flash memory. 6.3 connection of flashpro iii the connection of the flashpro iii and the pd78f0988a differs depending on the communication mode. the types of connections are shown in figures 6-2, 6-3, and 6-4. figure 6-2. connection of flashpro iii using 3-wire serial i/o mode v pp v clk dd reset flashpro iii sck sck so si gnd v pp v v ss0 x1 v v dd0 note dd1 reset si so ss1 pd78f0988a
pd78f0988a, 78f0988a(a) 21 data sheet u15801ej1v0ds figure 6-3. connection of flashpro iii using 3-wire serial i/o mode (when using handshake) note for input to x1, a normal oscillator can also be used instead of clk. figure 6-4. connection of flashpro iii using uart note for input to x1, a normal oscillator can also be used instead of clk. figure 6-5. connection of flashpro iii using pseudo 3-wire serial i/o mode note for input to x1, a normal oscillator can also be used instead of clk. v v pp clk dd reset so si v ss v pp v x1 dd0 note v dd1 v ss1 v ss0 reset rxd00 txd00 pd78f0988a flashpro iii (serial data output) v v clk pp reset dd sck so si v ss v pp v x1 dd0 note v dd1 p25 v ss1 v ss0 reset pd78f0988a flashpro iii (serial clock input) (serial data input) p24 p26 flashpro iii v pp v dd1 v dd0 x1 note reset sck si so p50 (hs) v ss0 v ss1 v pp v dd clk reset sck so si hs gnd pd78f0988a
pd78f0988a, 78f0988a(a) 22 data sheet u15801ej1v0ds 7. electrical specifications absolute maximum ratings (t a = 25 c) parameter symbol conditions ratings unit supply voltage v dd ?.3 to +6.5 v v pp ?.3 to +10.5 v av dd ?.3 to v dd + 0.3 v av ref ?.3 to v dd + 0.3 v av ss ?.3 to +0.3 v input voltage v i p00 to p03, p10 to p17, p20 to p26, p30 to p37, p50 ?.3 to v dd + 0.3 v to p57, p64 to p67, to70 to to75, x1, x2, reset output voltage v o ?.3 to v dd + 0.3 v analog input voltage v an p10 to p17 analog input pin av ss ?0.3 to av ref + 0.3 v and ?.3 to v dd + 0.3 output current, high i oh per pin ?0 ma p00, p01, p30 to p37, p40 to p47, p50 to p57, p64 to p67 total ?5 ma p02, p03, p20 to p26, to70 to to75 total ?5 ma output current, low i ol note p00 to p03, p10 to p17, p20 to p26, peak value 20 ma p30 to p37, p40 to p47, p64 to p67 per pin rms value 10 ma p50 to p57, to70 to to75 per pin peak value 30 ma rms value 15 ma p00, p01, p30 to p37, p40 to p47, p64 to p67 peak value 100 ma total rms value 70 ma p02, p03, p20 to p26 total peak value 30 ma rms value 15 ma to70 to to75 total peak value 100 ma rms value 70 ma p50 to p57 total peak value 100 ma rms value 70 ma operating ambient t a in normal operating mode ?0 to +85 c temperature in flash memory programming mode +10 to +40 c storage temperature t stg ?0 to +125 c note the rms value should be calculated as follows: [rms value] = [peak value] duty caution product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. that is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. capacitance (t a = 25 c, v dd = v ss = 0 v) parameter symbol conditions min. typ. max. unit input capacitance c in f = 1 mhz unmeasured pins returned to 0 v 15 pf i/o capacitance c io f = 1 mhz p00 to p03, p20 to p26, p30 15 pf unmeasured pins to p37, p40 to p47, p50 to returned to 0 v p57, p64 to p67, to70 to to75 remark unless specified otherwise, the characteristics of alternate-function pins are the same as those of port pins.
pd78f0988a, 78f0988a(a) 23 data sheet u15801ej1v0ds system clock oscillator characteristics (t a = ?0 to +85 c, v dd = 4.0 to 5.5 v) resonator recommended parameter conditions min. typ. max. unit circuit ceramic oscillation 1.0 8.38 mhz resonator frequency (f x ) note 1 oscillation after v dd reaches 4 ms stabilization oscillation time note 2 voltage range min. crystal oscillation 1.0 8.38 mhz resonator frequency (f x ) note 1 oscillation after v dd reaches 10 ms stabilization oscillation time note 2 voltage range min. external clock x1 input frequency 1.0 8.38 mhz (f x ) note 1 x1 input high-/low- 50 500 ns level width (t xh , t xl ) notes 1. indicates only oscillator characteristics. refer to ac characteristics for instruction execution time. 2. time required to stabilize oscillation after reset or stop mode release. caution when using the system clock oscillator, wire as follows in the area enclosed by the broken lines in the above figures to avoid an adverse effect from wiring capacitance. keep the wiring length as short as possible. do not cross the wiring with the other signal lines. do not route the wiring near a signal line through which a high fluctuating current flows. always make the ground point of the oscillator capacitor the same potential as v ss1 . do not ground the capacitor to a ground pattern through which a high current flows. do not fetch signals from the oscillator. c2 x1 x2 v pp c1 x2 x1 pd74hcu04 c2 x1 x2 v pp c1
pd78f0988a, 78f0988a(a) 24 data sheet u15801ej1v0ds recommended oscillator constant system clock: ceramic resonator (t a = ?0 to +85 c) manufacturer part number frequency recommended circuit constant oscillation voltage range (mhz) c1 (pf) c2 (pf) min. (v) max. (v ) murata mfg. csa2.00mg040 2.00 100 100 4.0 5.5 co., ltd. cst2.00mg040 2.00 on-chip on-chip 4.0 5.5 csa3.58mg 3.58 30 30 4.0 5.5 cst3.58mgw 3.58 on-chip on-chip 4.0 5.5 csa4.00mg 4.00 30 30 4.0 5.5 cst4.00mgw 4.00 on-chip on-chip 4.0 5.5 csa4.19mg 4.19 30 30 4.0 5.5 cst4.19mgw 4.19 on-chip on-chip 4.0 5.5 csa4.91mg 4.91 30 30 4.0 5.5 cst4.91mgw 4.91 on-chip on-chip 4.0 5.5 csa5.00mg 5.00 30 30 4.0 5.5 cst5.00mgw 5.00 on-chip on-chip 4.0 5.5 csa7.37mtz 7.37 30 30 4.0 5.5 cst7.37mtw 7.37 on-chip on-chip 4.0 5.5 csa8.00mtz 8.00 30 30 4.0 5.5 cst8.00mtw 8.00 on-chip on-chip 4.0 5.5 csa8.38mtz 8.38 30 30 4.0 5.5 cst8.38mtw 8.38 on-chip on-chip 4.0 5.5 caution the oscillator constant and oscillation voltage range indicate conditions of stable oscillation. oscillation frequency precision is not guaranteed. for applications requiring oscillation frequency precision, the oscillation frequency must be adjusted on the implementation circuit. for details, contact directly the manufacturer of the resonator you will use.
pd78f0988a, 78f0988a(a) 25 data sheet u15801ej1v0ds dc characteristics (t a = ?0 to +85 c, v dd = 4.0 to 5.5 v) parameter symbol conditions min. typ. max. unit input voltage, v ih1 p10 to p17, p21, p23, p30 to p37, p40 to p47, p50, p53, 0.7v dd v dd v high p64 to p67 v ih2 reset, p00 to p03, p20, p22, p24 to p26, p51, p52, 0.8v dd v dd v p54 to p57 v ih3 x1, x2 v dd ?0.5 v dd v input voltage, low v il1 p10 to p17, p21, p23, p30 to p37, p40 to p47, p50, p53, 0 0.3v dd v p64 to p67 v il2 reset, p00 to p03, p20, p22, p24 to p26, p51, p52, 0 0.2v dd v p54 to p57 v il3 x1, x2 0 0.4 v output voltage, v oh1 4.5 v v dd 5.5 v, i oh = ? ma v dd ?1.0 v dd v high i oh = ?00 a v dd ?0.5 v dd v output voltage, v ol1 p50 to p57, to70 to to75 5.0 v v dd 5.5 v, 0.4 2.0 v low i ol = 15 ma p00 to p03, p20 to p26, 5.0 v v dd 5.5 v, 0.4 v p30 to p37, p40 to p47, i ol = 1.6 ma p64 to p67 v ol2 i ol = 400 a 0.5 v input leakage i lih1 v in = v dd p00 to p03, p10 to p17, 3 a current, high p20 to p26, p30 to p37, p40 to p47, p50 to p57, p64 to p67, to70 to to75, reset i lih2 x1, x2 20 a input leakage i lil1 v in = 0 v p00 to p03, p10 to p17, ? a current, low p20 to p26, p30 to p37, p40 to p47, p50 to p57, p64 to p67, to70 to to75, reset i lil2 x1, x2 ?0 a output leakage i loh v out = v dd 3 a current, high output leakage i lol v out = 0 v ? a current, low software pull-up r 2 v in = 0 v 15 30 90 k ? resistor p00 to p03, p20 to p26, p30 to p37, p40 to p47, p50 to p57, p64 to p67 power supply i dd1 8.38 mhz crystal v dd = 5.0 v 10% note 2 when a/d 15 30 ma current note 1 oscillation converter operating mode stopped when a/d 16 32 ma converter operating i dd2 8.38 mhz crystal v dd = 5.0 v 10% note 2 when peripheral 1.3 2.6 ma oscillation halt function mode stopped when peripheral 7.3 ma function operating i dd3 stop mode v dd = 5.0 v 10% 0.1 30 a v pp supply voltage v pp1 in normal operation mode 0 0.2v dd v notes 1. refers to the total current flowing to the internal power supply (v dd0 and v dd1 ). the peripheral operation current is included, but the current flowing to the pull-up resistors of ports and the av ref pin is not. 2. high-speed mode operation (when the processor clock control register (pcc) is set to 00h). remark unless specified otherwise, the characteristics of alternate-function pins are the same as those of port pins.
pd78f0988a, 78f0988a(a) 26 data sheet u15801ej1v0ds ac characteristics (1) basic operation (t a = ?0 to +85 c, v dd = 4.0 to 5.5 v) parameter symbol conditions min. typ. max. unit cycle time t cy operating with system clock 0.24 32 s (min. instruction execution time) ti000, ti001, f ti0 0f x /64 mhz ti010, ti011 input frequency ti000, ti001, t tih0 2/f sam + s ti010, ti011 t til0 0.1 note input high-/ low-level width ti50, ti51, ti52 f ti5 8-/16-bit precision 0 4 mhz input frequency ti50, ti51, ti52 t tih5 8-/16-bit precision 100 ns input high-/ t til5 low-level width interrupt request t inth intp0 to intp7 1 s input high-/ t intl low-level width toff input t toffh 2 s high-/low-level t toffl width reset input t rsl 10 s low-level width note selection of f sam = f x , f x /4, f x /32 is possible with bits 0 and 1 (prm000, prm001) of prescaler mode register 00 (prm00) or with bits 0 and 1 (prm010, prm011) of prescaler mode register 01 (prm01). note that when selecting ti000 (tm00) or ti001 (tm01) valid edge as the count clock, f sam = f x /16.
pd78f0988a, 78f0988a(a) 27 data sheet u15801ej1v0ds t cy vs v dd (system clock operation) 5.0 1.0 2.0 0.24 0.1 supply voltage v dd [v] cycle time t cy [ s] 0 10.0 1.0 2.0 3.0 4.0 5.0 6.0 5.5 32.0 10.0 guaranteed operation range
pd78f0988a, 78f0988a(a) 28 data sheet u15801ej1v0ds (2) read/write operation (t a = ?0 to +85 c, v dd = 4.0 to 5.5 v) parameter symbol conditions min. max. unit astb high-level width t asth 0.3t cy ns address setup time t ads 20 ns address hold time t adh 6ns data input time from address t add1 (2 + 2n)t cy 54 ns t add2 (3 + 2n)t cy 60 ns address output time from rd t rdad 0 100 ns data input time from rd t rdd1 (2 + 2n)t cy 87 ns t rdd2 (3 + 2n)t cy 93 ns read data hold time t rdh 0ns rd low-level width t rdl1 (1.5 + 2n)t cy 33 ns t rdl2 (2.5 + 2n)t cy 33 ns wait input time from rd t rdwt1 t cy 43 ns t rdwt2 t cy 43 ns wait input time from wr t wrwt 0.5t cy 25 ns wait low-level width t wtl (0.5 + 2n)t cy + 10 (2 + 2n)t cy ns write data setup time t wds 60 ns write data hold time t wdh 6ns wr low-level width t wrl (1.5 + 2n)t cy 15 ns delay time from astb to rd t astrd 6ns delay time from astb to wr t astwr 2t cy 15 ns delay time from rd at external t rdast 0.8t cy 15 1.2t cy ns fetch to astb write data output time from rd t rdwd 40 ns write data output time from wr t wrwd 10 60 ns delay time from wait to rd t wtrd 0.8t cy 2.5t cy + 25 ns delay time from wait to wr t wtwr 0.8t cy 2.5t cy + 25 ns remarks 1. t cy = t cy /4 2. n indicates the number of waits. 3. c l = 100 pf (c l is the load capacitance of the ad0 to ad7, rd, wr, wait, and astb pins.)
pd78f0988a, 78f0988a(a) 29 data sheet u15801ej1v0ds (3) serial interface (t a = ?0 to +85 c, v dd = 4.0 to 5.5 v) (a) 3-wire serial i/o mode (sck... internal clock output) parameter symbol conditions min. typ. max. unit sck cycle time t kcy1 954 ns sck high-/low-level width t kh1 t kcy1 /2 50 ns t kl1 si setup time (to sck )t sik1 100 ns si hold time (from sck )t ksi1 400 ns delay time from sck t kso1 c = 100 pf note 300 ns to so output note c is the load capacitance of the sck and so output lines. (b) 3-wire serial i/o mode (sck... external clock input) parameter symbol conditions min. typ. max. unit sck cycle time t kcy2 800 ns sck high-/low-level width t kh2 400 ns t kl2 si setup time (to sck )t sik2 100 ns si hold time (from sck )t ksi2 400 ns delay time from sck t kso2 c = 100 pf note 300 ns to so output note c is the load capacitance of the sck and so output lines. (c) uart mode (uart00) (dedicated baud rate generator output) parameter symbol conditions min. typ. max. unit transfer rate 125000 bps (d) uart mode (uart00) (infrared data transfer mode) parameter symbol conditions min. typ. max. unit transfer rate 115200 bps bit rate allowable error 0.87 % output pulse width 1.2 0.24/fbr note s input pulse width 4/f x s note fbr: set baud rate (e) uart mode (uart01) (dedicated baud rate generator output) parameter symbol conditions min. typ. max. unit transfer rate 38400 bps
pd78f0988a, 78f0988a(a) 30 data sheet u15801ej1v0ds ac timing test points (excluding x1 input) clock timing ti timing toff timing x1 input v ih3 ( min. ) v il3 ( max. ) 1/f x t xl t xh ti000, ti001, ti010, ti011 ti50, ti51, ti52 1/f ti5 t til5 t tih5 1/f ti0 t til0 t tih0 toff7 t toffl t toffh 0.8v dd 0.2v dd test points 0.8v dd 0.2v dd
pd78f0988a, 78f0988a(a) 31 data sheet u15801ej1v0ds read/write operation external fetch (no wait): external fetch (wait insertion): ad0 to ad7 astb rd 8-bit address t add1 hi-z t ads t asth t adh t rdad t rdd1 operation code t rdast t astrd t rdl1 t rdh wait t rdwt1 t wtl t wtrd ad0 to ad7 astb rd 8-bit address t add1 hi-z t ads t asth t adh t rdd1 t rdad operation code t rdast t astrd t rdl1 t rdh
pd78f0988a, 78f0988a(a) 32 data sheet u15801ej1v0ds external data access (no wait): external data access (wait insertion): read data ad0 to ad7 astb rd wr hi-z hi-z 8-bit address write data t add2 t ads t asth t adh t rdad t rdd2 t rdh t astrd t rdl2 t wds t wdh t wrl t astwr t rdwd t wrwd read data hi-z hi-z 8-bit address write data t add2 t ads t asth t adh t rdad t rdd2 t rdh t astrd t rdl2 t wds t wdh t wrl t wtl t wtl t astwr t rdwd t rdwt2 t wrwd t wrwt t wtwr t wtrd ad0 to ad7 astb rd wr wait
pd78f0988a, 78f0988a(a) 33 data sheet u15801ej1v0ds serial transfer timing 3-wire serial i/o mode: m = 1, 2 si so t kcym t klm t khm t sikm t ksim input data t ksom output data sck
pd78f0988a, 78f0988a(a) 34 data sheet u15801ej1v0ds a/d converter characteristics (t a = ?0 to +85 c, v dd = av dd = 4.0 to 5.5 v, av ss = v ss = 0 v) parameter symbol conditions min. typ. max. unit resolution 10 10 10 bit overall error note 4.0 v av ref 5.5 v 0.2 0.4 %fsr 2.7 v av ref < 4.0 v 0.3 0.6 %fsr conversion time t conv 4.0 v av ref 5.5 v 14 96 s 2.7 v av ref < 4.0 v 19 96 s zero-scale error note 4.0 v av ref 5.5 v 0.4 %fsr 2.7 v av ref < 4.0 v 0.6 %fsr full-scale error note 4.0 v av ref 5.5 v 0.4 %fsr 2.7 v av ref < 4.0 v 0.6 %fsr non-linearity error 4.0 v av ref 5.5 v 2.5 lsb 2.7 v av ref < 4.0 v 4.5 lsb differential non-linearity error 4.0 v av ref 5.5 v 1.5 lsb 2.7 v av ref < 4.0 v 2.0 lsb analog input voltage v ian 0av ref v reference voltage av ref 2.7 av dd v resistance between av ref r ref when a/d converter is not operating 20 40 k ? and av ss note excludes quantization error ( 1/2 lsb). this value is indicated as a ratio (%fsr) to the full-scale value. data memory stop mode low supply voltage data retention characteristics (t a = ?0 to +85 c) parameter symbol conditions min. typ. max. unit data retention power v dddr 2.0 5.5 v supply voltage data retention i dddr v dddr = 2.0 v 0.1 10 a power supply current release signal set time t srel 0 s oscillation stabilization t wait release by reset 2 17 /f x ms wait time release by interrupt request note ms note selection of 2 12 /f x and 2 14 /f x to 2 17 /f x is possible with bits 0 to 2 (osts0 to osts2) of the oscillation stabilization time select register (osts).
pd78f0988a, 78f0988a(a) 35 data sheet u15801ej1v0ds data retention timing (stop mode release by reset) data retention timing (standby release signal: stop mode release by interrupt request signal) intp0 to intp7 t intl t inth reset t rsl v dd stop instruction execution reset stop mode data retention mode v dddr internal reset operation halt mode operation mode t wait t srel interrupt request input timing reset input timing v dd stop instruction execution standby release signal (interrupt request) stop mode data retention mode v dddr halt mode operation mode t srel t wait
pd78f0988a, 78f0988a(a) 36 data sheet u15801ej1v0ds flash memory programming characteristics (t a = 10 to 40 c, v dd = av dd = 4.0 to 5.5 v, v ss = av ss = 0 v, v pp = 9.7 to 10.3 v) (1) basic characteristics parameter symbol conditions min. typ. max. unit operation frequency f x 1.0 8.38 mhz supply voltage v dd 4.0 5.5 v v ppl when v pp low-level is detected 0 0.2v dd v v pp when v pp high-level is detected 0.8v dd v dd 1.2v dd v v pph when v pp high-voltage is detected 9.0 10.0 10.5 v when programming 9.7 10.0 10.3 v number of rewrites c wrt 20 note times programming temperature t prg 10 40 c note operation is not guaranteed for over 20 rewrites. remark after execution of the program command, execute the verify command and check that the writing has been completed normally. (2) serial write operation characteristics parameter symbol conditions min. typ. max. unit set time from v dd to v pp t drpsr v pp high voltage 0 s set time from v pp to reset t psrrf v pp high voltage 1.0 s v pp count start time from reset t rfcf v pp high voltage 1.0 s count execution time t count 20 ms v pp counter high-level width t ch 8.0 s v pp counter low-level width t cl 8.0 s v pp counter noise elimination width t nfw 40 ns flash write mode setting timing v dd v dd 0 v v dd reset (input) 0 v v pph v ppl v pp v pp t rfcf t psrrf t drpsr t ch t cl t count
pd78f0988a, 78f0988a(a) 37 data sheet u15801ej1v0ds (3) write erase characteristics parameter symbol conditions min. typ. max. unit v pp supply voltage v pp2 during flash memory programming 9.7 10.0 10.3 v v dd supply current i dd when v pp = v pp2 , f xx = 8.38 mhz 40 ma v pp supply current i pp when v pp = v pp2 100 ma step erase time t er note 1 0.199 0.2 0.201 s overall erase time per t era when step erase time = 0.2 s note 2 20 s/area area write-back time t wb note 3 49.4 50 50.6 ms number of write-backs c wb when write-back time = 50 ms note 4 60 times/ per write-back command write- back command number of erase/ c erwb 16 times write-backs step write time t wr note 5 48 50 52 s overall write time per t wrw when step write time = 50 s 48 520 s/ word (1 word = 1 byte) note 6 word number of rewrites per c erwr 1 erase + 1 write after erase = 1 rewrite note 7 20 times/ area area notes 1. the recommended setting value for the step erase time is 0.2 s. 2. the prewrite time before erasure and the erase verify time (write-back time) is not included. 3. the recommended setting value for the write-back time is 50 ms. 4. write-back is executed once by the issuance of the write-back command. therefore, the number of retries must be the maximum value minus the number of commands issued. 5. recommended step write setting value is 50 s. 6. the actual write time per word is 100 s longer. the internal verify time during or after a write is not included. 7. when a product is first written after shipment, ?rase write?and ?rite only?are both taken as one rewrite. example: p: write, e: erase shipped product p e p e p: 3 rewrites shipped product e p e p e p: 3 rewrites remarks 1. the range of the operating clock during flash memory programming is the same as the range during normal operation. 2. when using the pg-fp3, the time parameters that need to be downloaded from the parameter files for write/erase are automatically set. unless otherwise directed, do not change the set values.
pd78f0988a, 78f0988a(a) 38 data sheet u15801ej1v0ds 8. package drawings i j g h f d n m cb m r 64 33 32 1 l notes p64c-70-750a,c-4 item millimeters b c d f g h j k 1.778 (t.p.) 3.2 0.3 0.51 min. 1.78 max. l m 0.17 0.25 19.05 (t.p.) 5.08 max. 17.0 0.2 n 0 15 0.50 0.10 0.9 min. r + 0.10 ? 0.05 1. each lead centerline is located within 0.17 mm of its true position (t.p.) at maximum material condition. 2. item "k" to center of leads when formed parallel. a 58.0 + 0.68 ? 0.20 i 4.05 + 0.26 ? 0.20 64-pin plastic sdip (19.05mm(750)) a k
pd78f0988a, 78f0988a(a) 39 data sheet u15801ej1v0ds 48 49 32 64 1 17 16 33 64-pin plastic qfp (14x14) note each lead centerline is located within 0.15 mm of its true position (t.p.) at maximum material condition. item millimeters a b d g 17.6 0.4 14.0 0.2 0.8 (t.p.) 1.0 j 17.6 0.4 k p64gc-80-ab8-5 c 14.0 0.2 i 0.15 1.8 0.2 l 0.8 0.2 f 1.0 n p q 0.10 2.55 0.1 0.1 0.1 r s 5 5 2.85 max. h 0.37 + 0.08 ? 0.07 m 0.17 + 0.08 ? 0.07 s s n j detail of lead end c d a b r k m l p i s q g f m h
pd78f0988a, 78f0988a(a) 40 data sheet u15801ej1v0ds 64-pin plastic lqfp (14x14) note each lead centerline is located within 0.20 mm of its true position (t.p.) at maximum material condition. item millimeters a b d g 17.2 0.2 14.0 0.2 0.8 (t.p.) 1.0 j 17.2 0.2 k c 14.0 0.2 i 0.20 1.6 0.2 l 0.8 f 1.0 n p q 0.10 1.4 0.1 0.127 0.075 u 0.886 0.15 r s 3 1.7 max. t 0.25 p64gc-80-8bs h 0.37 + 0.08 ? 0.07 m 0.17 + 0.03 ? 0.06 s n j t detail of lead end c d a b k m i s p r l u q g f m h + 4 ? 3 1 64 49 17 32 16 48 33 s
pd78f0988a, 78f0988a(a) 41 data sheet u15801ej1v0ds 9. recommended soldering conditions this product should be soldered and mounted under the following recommended conditions. for soldering methods and conditions other than those recommended below, contact an nec sales representative. for details of the recommended soldering conditions, refer to the document semiconductor device mounting technology manual (c10535e) . table 9-1. surface mounting type soldering conditions (1) pd78f0988agc-ab8: 64-pin plastic qfp (14 14) soldering method soldering conditions recommended condition symbol infrared reflow package peak temperature: 235 c, time: 30 seconds max. ir35-00-3 (at 210 c or higher), count: three times or less vps package peak temperature: 215 c, time: 40 seconds max. vp15-00-3 (at 200 c or higher), count: three times or less wave soldering solder bath temperature: 260 c max., time: 10 seconds max., ws60-00-1 count: once, preheating temperature: 120 c max. (package surface temperature) partial heating pin temperature: 300 c max., time: 3 seconds max. (per pin row) caution do not use different soldering methods together (except for partial heating). (2) pd78f0988agc(a)-ab8: 64-pin plastic qfp (14 14) soldering method soldering conditions recommended condition symbol infrared reflow package peak temperature: 235 c, time: 30 seconds max. ir35-00-2 (at 210 c or higher), count: two times or less vps package peak temperature: 215 c, time: 40 seconds max. vp15-00-2 (at 200 c or higher), count: two times or less wave soldering solder bath temperature: 260 c max., time: 10 seconds max., ws60-00-1 count: once, preheating temperature: 120 c max. (package surface temperature) partial heating pin temperature: 300 c max., time: 3 seconds max. (per pin row) caution do not use different soldering methods together (except for partial heating). table 9-2. insertion type soldering conditions pd78f0988acw: 64-pin plastic sdip (19.05 mm (750)) soldering method soldering condition wave soldering solder bath temperature: 260 c max., time: 10 seconds max. (only for pins) partial heating pin temperature: 300 c max., time: 3 seconds max. (per pin row) caution apply wave soldering only to the pins and be careful not to bring solder into direct contact with the package.
pd78f0988a, 78f0988a(a) 42 data sheet u15801ej1v0ds appendix a. development tools the following development tools are available for system development using the pd780988 subseries. also refer to (5) cautions on using development tools . (1) software package sp78k0 software package common to 78k/0 series (2) language processing software ra78k0 assembler package common to 78k/0 series cc78k0 c compiler package common to 78k/0 series df780988 device file for pd780988 subseries cc78k0-l c compiler library source file common to 78k/0 series (3) flash memory writing tools flashpro iii (part no. fl-pr3, flash programmer dedicated to on-chip flash memory microcontroller pg-fp3) fa-64cw adapter for flash memory writing. used connected to flashpro iii. fa-64gc ?fa-64cw: for 64-pin plastic sdip (cw type) fa-64gc-8bs-a ?fa-64gc: for 64-pin plastic qfp (gc-ab8 type) ?fa-64gc-8bs-a: for 64-pin plastic lqfp (gc-8bs type) (4) debugging tools ? when ie-78k0-ns, ie-78k0-ns-a in-circuit emulator is used ie-78k0-ns in-circuit emulator common to 78k/0 series ie-78k0-ns-pa performance board for enhancement and expansion of ie-78k0-ns functions ie-78k0-ns-a combination of ie-78k0-ns and ie-78k0-ns-pa ie-70000-mc-ps-b power supply unit for ie-78k0-ns ie-70000-98-if-c interface adapter necessary when pc-9800 series pc (except notebook type) is used as host machine (c bus supported) ie-70000-cd-if-a pc card and interface cable when notebook pc is used as host machine (pcmcia socket supported) ie-70000-pc-if-c interface adapter necessary when using ibm pc/at tm or compatible as host machine (isa bus supported) ie-70000-pci-if-a adapter necessary when using pci bus incorporated personal computer as host machine ie-780988-ns-em4, emulation board and i/o board to emulate pd780988 subseries ie-78k0-ns-p01 np-64cw emulation probe for 64-pin plastic sdip (cw type) np-64gc emulation probe for 64-pin plastic qfp (gc-ab8 type), 64-pin plastic lqfp np-64gc-tq (gc-8bs type) np-h64gc-tq ev-9200gc-64 conversion socket to connect the np-64gc and a target system board on which the 64-pin plastic qfp (gc-ab8 type), 64-pin plastic lqfp (gc-8bs type) can be mounted tgc-064sap conversion adapter to connect the np-64gc-tq or np-h64gc-tq and a target system board on which the 64-pin plastic qfp (gc-ab8 type), 64-pin plastic lqfp (gc-8bs type) can be mounted id78k0-ns integrated debugger for ie-78k0-ns sm78k0 system simulator common to 78k/0 series df780988 device file for pd780988 subseries
pd78f0988a, 78f0988a(a) 43 data sheet u15801ej1v0ds ? when ie-78001-r-a in-circuit emulator is used ie-78001-r-a in-circuit emulator common to 78k/0 series ie-70000-98-if-c adapter necessary when pc-9800 series pc (except notebook type) is used as host machine (c bus supported) ie-70000-pc-if-c adapter necessary when using ibm pc/at or compatible as host machine (isa bus supported) ie-70000-pci-if-a adapter necessary when using pci bus incorporated personal computer as host machine ie-78000-r-sv3 interface adapter and cable when using ews as host machine ie-780988-ns-em4, emulation board and i/o board to emulate pd780988 subseries ie-78k0-ns-p01 ie-78k0-r-ex1 emulation probe conversion board necessary when using ie-780988-ns-em4 and ie-78k0-ns-p01 on ie-78001-r-a ep-78240cw-r emulation probe for 64-pin plastic sdip (cw type) ep-78240gc-r emulation probe for 64-pin plastic qfp (gc-ab8 type), 64-pin plastic lqfp (gc-8bs type) ev-9200gc-64 socket to connect target system board made for mounting 64-pin plastic qfp (gc-ab8 type) or 64-pin plastic lqfp (gc-8bs type) and ep-78240gc-r id78k0 integrated debugger for ie-78001-r-a sm78k0 system simulator common to 78k/0 series df780988 device file for pd780988 subseries (5) real-time os rx78k0 real-time os for 78k/0 series (6) cautions on using development tools the id78k0-ns, id78k0, and sm78k0 are used in combination with the df780988. the cc78k0 and rx78k0 are used in combination with the ra78k0 or df780988. the fl-pr3, fa-64cw, fa-64gc, np-64cw, np-64gc, np-64gc-tq, and np-h64gc-tq are products made by naito densei machida mfg. co., ltd. (tel +81-45-475-4191). the tgc-064sap is a product made by tokyo eletech corporation. for further information, contact: daimaru kogyo, ltd. tokyo electronics department (tel +81-3-3820-7112) osaka electronics department (tel +81-6-6244-6672) for third-party development tools, see the single-chip microcontroller development tool selection guide (u11069e) . the host machine and os suitable for each software are as follows. host machine pc ews [os] pc-9800 series [japanese windows tm ] hp9000 series 700 tm [hp-ux tm ] ibm pc/at and compatibles sparcstation tm [sunos tm , solaris tm ] software [japanese/english windows] ra78k0 note cc78k0 note id78k0-ns id78k0 sm78k0 rx78k0 note note dos-based software
pd78f0988a, 78f0988a(a) 44 data sheet u15801ej1v0ds (7) cautions on designing target system the connection condition diagrams for an emulation probe, conversion connector, and conversion socket or conversion adapter are shown below. design the system taking into consideration the dimension or shape, etc. of the parts to be mounted on the target system. table a-1. distance between in-circuit emulator and conversion socket emulation probe conversion adapter, distance between in-circuit emulator conversion socket and conversion socket or conversion adapter np-64gc ev-9200gc-64 170 mm np-64gc-tq tgc-064sap 170 mm np-h64gc-tq 370 mm np-64cw 160 mm figure a-1. distance between in-circuit emulator and conversion socket or conversion adapter (1) in-circuit emulator: ie-78k0-ns or ie-78k0-ns-a emulation probe: np-64gc, np-64gc-tq emulation board: ie-780988-ns-em4 cn6 170 mm target system (64gc) conversion socket: ev-9200gc-64, conversion adapter: tgc-064sap
pd78f0988a, 78f0988a(a) 45 data sheet u15801ej1v0ds figure a-2. distance between in-circuit emulator and conversion socket or conversion adapter (2) figure a-3. distance between in-circuit emulator and conversion socket or conversion adapter (3) in-circuit emulator: ie-78k0-ns or ie-78k0-ns-a emulation probe: np-h64gc-tq conversion adapter: tgc-064sap emulation board: ie-780988-ns-em4 cn6 370 mm target system (64gc) in-circuit emulator: ie-78k0-ns or ie-78k0-ns-a emulation probe: np-64cw emulation board: ie-780988-ns-em4 cn7 160 mm target system (64cw) ic socket
pd78f0988a, 78f0988a(a) 46 data sheet u15801ej1v0ds figure a-4. connection condition of target system (1) figure a-5. connection condition of target system (2) emulation board: ie-780988-ns-em4 emulation probe: np-64gc conversion socket: ev-9200gc-64 25 mm 50 mm 10 mm 35 mm 35 mm 1 pin 18.5 mm 60 mm target system 10 mm 34 mm 17 mm 1 pin emulation probe: np-64gc-tq emulation board: ie-780988-ns-em4 25 mm 34 mm 40 mm 23 mm 65 mm target system 11 mm 17 mm conversion adapter: tgc-064sap
pd78f0988a, 78f0988a(a) 47 data sheet u15801ej1v0ds figure a-6. connection condition of target system (3) figure a-7. connection condition of target system (4) 1 pin emulation board: ie-780988-ns-em4 23 mm 17 mm 17 mm 45 mm 11 mm 42 mm 10.0 mm 45 mm 52 mm conversion adapter: tgc-064sap target system emulation probe: np-h64gc-tq emulation probe: np-64cw emulation board: ie-780988-ns-em4 20 mm 33 mm 24 mm 13 mm 8 mm 34 mm 14 mm 40 mm 25 mm 34 mm target system
pd78f0988a, 78f0988a(a) 48 data sheet u15801ej1v0ds appendix b. related documents the related documents indicated in this publication may include preliminary versions. however, preliminary versions are not marked as such. ? documents related to devices document name document no. pd780988 subseries user? manual u13029e pd780982, 780983, 780984, 780986, 780988, 780982(a), 780983(a), 780984(a), 780986(a), u12804e 780988(a) data sheet pd78f0988a, 78f0988a(a) data sheet this manual pd780988 subseries inverter control application note u13119e 78k/0 series instructions user? manual u12326e ? documents related to development software tools (user? manuals) document name document no. ra78k0 assembler package operation u14445e language u14446e structured assembly language u11789e cc78k0 c compiler operation u14297e language u14298e sm78k0s, sm78k0 system simulator ver. 2.10 or later operation (windows based) u14611e sm78k series system simulator ver. 2.10 or later external part user open u15006e interface specifications id78k0-ns integrated debugger ver. 2.00 or later operation (windows based) u14379e id78k0 integrated debugger windows based reference u11539e guide u11649e rx78k0 real-time os fundamentals u11537e installation u11536e project manager ver. 3.12 or later (windows based) u14610e ? documents related to development hardware tools (user? manuals) document name document no. ie-78k0-ns in-circuit emulator u13731e ie-78k0-ns-a in-circuit emulator u14889e ie-78001-r-a in-circuit emulator u14142e ie-78k0-r-ex1 in-circuit emulator to be prepared
pd78f0988a, 78f0988a(a) 49 data sheet u15801ej1v0ds ? documents related to flash memory writing document name document no. pg-fp3 flash memory programmer user? manual u13502e ? other related documents document name document no. semiconductors selection guide - products & packages - x13769e semiconductor device mounting technology manual c10535e quality grades on nec semiconductor devices c11531e nec semiconductor device reliability/quality control system c10983e guide to prevent damage for semiconductor devices by electrostatic discharge (esd) c11892e caution the related documents listed above are subject to change without notice. be sure to use the latest version of each document for designing.
pd78f0988a, 78f0988a(a) 50 data sheet u15801ej1v0ds notes for cmos devices 1 precaution against esd for semiconductors note: strong electric field, when exposed to a mos device, can cause destruction of the gate oxide and ultimately degrade the device operation. steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. environmental control must be adequate. when it is dry, humidifier should be used. it is recommended to avoid using insulators that easily build static electricity. semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. all test and measurement tools including work bench and floor should be grounded. the operator should be grounded using wrist strap. semiconductor devices must not be touched with bare hands. similar precautions need to be taken for pw boards with semiconductor devices on it. 2 handling of unused input pins for cmos note: no connection for cmos device inputs can be cause of malfunction. if no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. cmos devices behave differently than bipolar or nmos devices. input levels of cmos devices must be fixed high or low by using a pull-up or pull-down circuitry. each unused pin should be connected to v dd or gnd with a resistor, if it is considered to have a possibility of being an output pin. all handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 status before initialization of mos devices note: power-on does not necessarily define initial status of mos device. production process of mos does not define the initial operation status of the device. immediately after the power source is turned on, the devices with reset function have not yet been initialized. hence, power-on does not guarantee out-pin levels, i/o settings or contents of registers. device is not initialized until the reset signal is received. reset operation must be executed immediately after power-on for devices having reset function. fip and iebus are trademarks of nec corporation. windows is either a registered trademark or a trademark of microsoft corporation in the united states and/ or other countries. pc/at is a trademark of international business machines corporation. hp9000 series 700 and hp-ux are trademarks of hewlett-packard company. sparcstation is a trademark of sparc international, inc. solaris and sunos are trademarks of sun microsystems, inc.
pd78f0988a, 78f0988a(a) 51 data sheet u15801ej1v0ds regional information some information contained in this document may vary from country to country. before using any nec product in your application, piease contact the nec office in your country to obtain a list of authorized representatives and distributors. they will verify: ? device availability ? ordering information ? product release schedule ? availability of related technical literature ? development environment specifications (for example, specifications for third-party tools and components, host computers, power plugs, ac supply voltages, and so forth) ? network requirements in addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary from country to country. nec electronics inc. (u.s.) santa clara, california tel: 408-588-6000 800-366-9782 fax: 408-588-6130 800-729-9288 nec electronics (germany) gmbh duesseldorf, germany tel: 0211-65 03 02 fax: 0211-65 03 490 nec electronics (uk) ltd. milton keynes, uk tel: 01908-691-133 fax: 01908-670-290 nec electronics italiana s.r.l. milano, italy tel: 02-66 75 41 fax: 02-66 75 42 99 nec electronics (germany) gmbh benelux office eindhoven, the netherlands tel: 040-2445845 fax: 040-2444580 nec electronics (france) s.a. velizy-villacoublay, france tel: 01-3067-5800 fax: 01-3067-5899 nec electronics (france) s.a. madrid office madrid, spain tel: 091-504-2787 fax: 091-504-2860 nec electronics (germany) gmbh scandinavia office taeby, sweden tel: 08-63 80 820 fax: 08-63 80 388 nec electronics hong kong ltd. hong kong tel: 2886-9318 fax: 2886-9022/9044 nec electronics hong kong ltd. seoul branch seoul, korea tel: 02-528-0303 fax: 02-528-4411 nec electronics singapore pte. ltd. novena square, singapore tel: 253-8311 fax: 250-3583 nec electronics taiwan ltd. taipei, taiwan tel: 02-2719-2377 fax: 02-2719-5951 nec do brasil s.a. electron devices division guarulhos-sp, brasil tel: 11-6462-6810 fax: 11-6462-6829 j01.2
pd78f0988a, 78f0988a(a) m8e 00. 4 the information in this document is current as of september, 2001. the information is subject to change without notice. for actual design-in, refer to the latest publications of nec's data sheets or data books, etc., for the most up-to-date specifications of nec semiconductor products. not all products and/or types are available in every country. please check with an nec sales representative for availability and additional information. no part of this document may be copied or reproduced in any form or by any means without prior written consent of nec. nec assumes no responsibility for any errors that may appear in this document. nec does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from the use of nec semiconductor products listed in this document or any other liability arising from the use of such products. no license, express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of nec or others. descriptions of circuits, software and other related information in this document are provided for illustrative purposes in semiconductor product operation and application examples. the incorporation of these circuits, software and information in the design of customer's equipment shall be done under the full responsibility of customer. nec assumes no responsibility for any losses incurred by customers or third parties arising from the use of these circuits, software and information. while nec endeavours to enhance the quality, reliability and safety of nec semiconductor products, customers agree and acknowledge that the possibility of defects thereof cannot be eliminated entirely. to minimize risks of damage to property or injury (including death) to persons arising from defects in nec semiconductor products, customers must incorporate sufficient safety measures in their design, such as redundancy, fire-containment, and anti-failure features. nec semiconductor products are classified into the following three quality grades: "standard", "special" and "specific". the "specific" quality grade applies only to semiconductor products developed based on a customer-designated "quality assurance program" for a specific application. the recommended applications of a semiconductor product depend on its quality grade, as indicated below. customers must check the quality grade of each semiconductor product before using it in a particular application. "standard": computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots "special": transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) "specific": aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems and medical equipment for life support, etc. the quality grade of nec semiconductor products is "standard" unless otherwise expressly specified in nec's data sheets or data books, etc. if customers wish to use nec semiconductor products in applications not intended by nec, they must contact an nec sales representative in advance to determine nec's willingness to support a given application. (note) (1) "nec" as used in this statement means nec corporation and also includes its majority-owned subsidiaries. (2) "nec semiconductor products" means any semiconductor product developed or manufactured by or for nec (as defined above). ? ? ? ? ? ?

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